I have been playing with the idea to use this interface in some projects for some while already. The first successful test was done within a few hours after I got an small nice and nifty board with FT2232H and small FPGA from China Gowin Semiconductor.
LittleBee board from Trenz Electronic |
This is of course no actual real use yet, but it shows that the simple way of using standard COM port drivers to send high speed data really works. If we want to talk to the "application" in the FPGA we use standard serial port drivers be it on Linux or Windows host (Virtual COM port drivers are provided by FTDI).
Next Step - some real use ? For this I need to write some more complex FPGA code than the serial loop-back I used for initial testing. I could continue using the LittleBee board. But I would prefer to use my favorite environment Vivado for the IP Core development. I have FPGA boards that include Xilinx FPGA and have FTDI Channel B connected to the FPGA I/O Pins (as example TE0723 Arduino-Zynq board) but well there could be problems when trying to connect to channel B fast-serial and at the same time use channel B as Vivado JTAG (actually I tried it once and really did face such problems). Also this usage would need FT_PROG to be used on TE0723 an action that would destroy the Xilinx JTAG License ID in the FT2232 User EEPROM.
Solution? Let's use TE0723 for FPGA development and debug but with FT2232H connected externally to the PMOD on TE0723. This can be easily done, there is not even need for flying wires for this, I can create a FT2232 "custom breakout" from say a Lattice FPGA board XO2000
XO2000 board from Trenz Electronic |
Porting the code from Gowin to Lattice Diamond was done in less 30 minutes and "echo" test performed within an hour or so. So far so good.
Taking out the "echo" code and replacing it with "wiring only" code that directly connects signals from FTDI Channel B to PMOD pins takes another 30 minutes.
Done, now I can proceed with development with Vivado, the fast-serial interface comes from second FT2232 with no Xilinx JTAG license, so Vivado would not see it at all.
I guess the first step would be taking the echo loop-back code that is tested and working and implement it in Xilinx FPGA to verify the setup and pin-mapping is correct. Then it would be time to proceed with real IP Core development for the fast-serial mode.
(to be continued)
I am glad to see you have found some use for FTDI and FPGA, that just seems very smart combination!
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