Lattice Propel it's easy!

Lattice is promoting its easy-to-use RISC-V design tool for some time already, but well I did not have suitable target hardware, well until now.

This is a small development board with Lattice Certus NX FPGA and CRUVI host slot and pin headers (visible in the bottom layer). Board available here: CR00103 shop.

OK, let's start the Propel ding! 

Run Propel, and select new workspace (an empty location on the hard drive). 

File New, Lattice SoC design project. Setting project name, select the device name, and select template design "Hello World Project". Done. Now let's set up the SDK project too. 

File new, Lattice C/C++ Project, finish. Build the C project. Done.

And we are done with the Propel/SDK now let's see how we can build the FPGA design. From the main menu LatticeTools, select "Open design in Propel Builder". Propel Builder launches and displays a block diagram of the SoC system.

Checking that SDK compiled memory image is assigned properly:

Now we have really done with the Builder.

Click on Generate and then another click to launch Radiant for back-end work. In Radiant, we need to add IO constraints. This is tricky we need to set the PDC filename to match the name of the project or it would not be found later.

Done, empty constraint file exists at the proper location. Now we need to set the constraints to match the board IO. I have them ready so I just copy them from another project. 

ldc_set_location -site {A8} [get_ports {led_o[0]}]

ldc_set_location -site {B8} [get_ports {led_o[1]}]

ldc_set_location -site {B2} [get_ports rstn_i]

ldc_set_location -site {C11} [get_ports rxd_i]

ldc_set_location -site {F11} [get_ports txd_o]

ldc_set_sysconfig {INITN_PORT=DISABLE}

Done.

Now we can click on "Export Files" and go grab a coffee or two while the design runs. Bad luck the design is already completed no time to bring another coffee. Does it work? Setting up UART console at 115200 baud. Starting the programmer! Done! And voila we have hello world! It worked!

We have Hello World running on Certus-NX FPGA!

Now I need to select the necessary files and create a reference design archive so others can start quickly with this board. But it's basically easy. It just works. Can it be just that simple? Well seems like, it worked first try!