ArrowBlaster Internals

 ArrowBlaster (TEI0004) and ArrowBlaster SMD (TEI0005) are both based on FT2232H USB FIFO chip. There are no custom OS drivers involved, the standard FTDI drivers are used for both. What is downloadable from Trenz Electronic website as "driver" is actually a DLL/SO dynamic library for Windows/Linux for Quartus to recognize the programmer hardware. This DLL uses channel A (ADBUS0..3) in MPSSE mode to access the standard mapping JTAG pins connected to it. ADBUS7 is connected to RED LED (active low) and it is used as a busy indicator by the Arrow software DLL.

Quartus <> Arrow "driver" DLL <> D2XX library DLL <> FTDI USB drivers

ADBUS4 (named PROC_RST on TEI0004) is described in the documentation as "for future use" but it is highly unlikely that the Quartus DLL will ever utilize this pin. So it is free for use by the end-user applications. So at any time when the Quartus is not accessing JTAG ADBUS4 can be controlled by the user application over D2XX DLL/SO. One example of usage would be control of the JTAG Enable signal - some FPGAs (like MAX10) can use the dedicated JTAG pins in User Mode. During programming and debugging the JTAG would be enabled, and then in user mode, the end-user application would access ADBUS0..3 via D2XX say like an SPI port between the user application and the FPGA code. FTDI provides lots of examples of D2XX library use.

Arrow driver does not access channel B at all, so it is free for the end-user at all times. Channel B is free for end-user to be used as an extra UART channel to the FPGA. On TEI0005 there is one more pin BCBUS0 available to the end-user. This could be controlled over D2XX DLL easily. It is also possible to control the UART function over D2XX so in this case, the end-user could use port B UART and one GPIO pin at the same time. Another use case could be channel B as UART via VCP drivers, and channel B ADBUS4 as GPIO over D2XX at the same time (Quartus not active).

Third-party software that supports FT2232H can also use these adapters. One example application is SVF player.

FT2232H EEPROM is programmed with "Quartus License" information, if you erase or over-write it, then Quartus would no longer recognize the dongle. It is possible to convert the adapters to Microsemi programmer (TEI0004 VREF pin would not map to Microsemi pinout so custom wiring is needed in that case).

Some use cases:

Case 0:

• Channel A - Quartus or 3rd party FT2232 JTAG software active
• Channel B VCP UART
• ADBUS4 not usable
• BCBUS0 not usable

Case 1: 

• Channel A - No JTAG software active, or custom D2XX software
• Channel B VCP UART
• ADBUS4 D2XX custom software GPIO1
• BCBUS0 not usable

Case 2: 

• Channel A - No JTAG software active, or custom D2XX software
• Channel B D2XX UART
• ADBUS4 D2XX custom software GPIO1
• BCBUS0 D2XX custom software GPIO 2

Xilinx 3.3V LVDS

Sometimes we have a Xilinx 7 series FPGA board with 3.3V VCCIO (HR bank) and we need LVDS output in those banks. What to-do? Selecting LVDS for those banks will not work at all, because Xilinx 7 series IO drive circuits include a VCCIO comparator that switches the differential (except TMDS_33) outputs off if the VCCIO is above 2.65V.

Solution 1: We select LVCMOS33 and use complementary outputs in RTL code. This is a very rude approach, but it may in some rare cases be acceptable.

Solution 2: We use LVCMOS33 outputs with an external resistor divider network (3 resistors) to adjust the differential output voltage to LVDS levels.

Solution 3: We use TMDS_33 outputs with 50 ohms pull-up resistors to 1.5V. This is the best solution, but it needs external termination voltage.

Solution 4: We use TMDS_33 outputs with a 100ohm resistor divide option, one resistor from signal to ground, and one resistor from signal to 3.3V supply (4 resistors total). This should also be a somewhat acceptable solution.

Solution 5: We use external CMOS to LVDS buffer IC.

Differential inputs work at 3.3 VCCIO, only on-chip termination is not available, so you need an external 100ohm parallel termination resistor for inputs.

See also Xilinx answer record 43989

MEGA65 ready for shipping

 The first real batch of MEGA65 retro computers is ready for shipping!

Tested MEGA65 units waiting to be boxed into the real shipping boxes, with color print on the boxes.

Really colorful!

More packaging boxes inside the colorbox!

The colored box is then inserted into the outer shipping box before sending it away.